The present invention relates to an insulated gate bipolar transistor, a manufacturing method of such a transistor, a semiconductor device using such an insulated gate bipolar transistor and a manufacturing method thereof.
In a power semiconductor device for driving a load such as a motor, an insulated gate bipolar transistor (referred to simply as an IGBT) is used in a rated voltage area of not less than 300 V as a switching element installed therein so as to provide a better characteristic. In this case, a circulating diode parallel-connected to the switching element is used at the same time.
FIG. 29 is a front cross-sectional view that shows a conventional IGBT. This IGBT 151 comprises a semiconductor substrate 90 having first and second major surfaces. This semiconductor substrate 90, which is a silicon substrate, comprises a P+ collector layer 91 that is a P+ substrate exposed to the first major surface, an N+ buffer layer 92 formed thereon, an Nxe2x88x92 base layer 93 that is formed thereon, and has a lower concentration of impurities than the N+ buffer layer 92, a P base region 2 that is formed by selectively diffusing P-type impurities on the second major surface to which the Nxe2x88x92 base layer 93 is exposed, and an N+ source region 3 that is formed as a shallower region than the P base region 2 by selectively diffusing N-type impurities with a high concentration inside this P base region 2.
On the second major surface of the semiconductor substrate 90 is formed a gate insulating film 4 made of a silicon dioxide in a manner so as to cover one portion of a surface of P the base region 2 and a surface of the Nxe2x88x92 base layer 93. A gate electrode 5 made of polysilicon is formed on the gate insulating film 4. On the upper major surface of the semiconductor substrate 90, an emitter electrode 7 is further formed so as to connect one portion of the surface of the N+ source region 3 and a center area of the surface of the P base region 2. The gate electrode 5 and the emitter electrode 7 are insulated from each other by an interlayer insulating film 6.
Therefore, the Nxe2x88x92 base layer 93, the P base region 2 and the N+ source region 3, which are formed on the second major surface side of the semiconductor substrate 90, correspond to a semiconductor portion of an MOS transistor. The portion having the same structure as the MOS transistor, which is formed on the second major surface of the semiconductor substrate 90, is referred to as an MOS structure M. A portion of the surface of the P base region 2, which is located right below the gate electrode 5, and sandwiched by the source region 3 and the Nxe2x88x92 base layer 93, that is, a portion at which the gate electrodes 5 face each other with the gate insulating film 4 sandwiched in between, corresponds to a channel region CH of the MOS structure M. The P base region 2 and the N+ source region 3 are formed by selectively implanting and diffusing impurities by using the gate electrode 5 as a mask. That is, since the P base region 2 and the N+ source region 3 form a double diffusion region, the MOS structure M forms one example of a Double Diffused MOS (referred to simply as a DMOS). A collector electrode 8 to be connected to the P+ collector layer 91 is formed on the first major surface of the semiconductor substrate 90.
FIG. 30 is a front cross-sectional view of an insulated gate bipolar transistor in accordance with another conventional example. This IGBT151a is typically different from IGBT151 in its MOS structure M formed on the second major surface side of the semiconductor substrate 90. A trench 9, which penetrates an N+ source region 3 and a P base region 2 to reach an Nxe2x88x92 base layer 93, is formed on the second major surface, and a gate insulating film 4 is formed in a manner so as to cover the inner wall face thereof. Moreover, a gate electrode 5 is buried inside the gate insulating film 4. In this IGBT151a also, a portion of a surface of the P base region 2 (which includes a surface exposed to the trench 9), which is sandwiched by the N+ source region 3 and an Nxe2x88x92 base layer 93, that is, a portion at which the gate electrodes 5 face each other with the gate insulating film 4 sandwiched in between, corresponds to a channel region CH of an MOS transistor.
In this manner, each of the planar IGBT151 of FIG. 29 and the trench-type IGBT151a of FIG. 30 comprises the P+ collector layer 91 that is exposed to the first major surface of the semiconductor substrate 90, the N base layers 92, 93 formed thereon, the MOS structure M (including one portion of the Nxe2x88x92 base layer 93) formed on the second major surface and the collector electrode 8 that is formed on the first major surface and connected to the P+ collector layer 91. Normally, a number of cells, shown in FIGS. 29 and 30, are reciprocally arranged along the major surfaces of the semiconductor substrate 90 so that a greater current rate is obtained by this arrangement. In FIG. 29, one cell is drawn, and in FIG. 30, two cells are drawn.
Next, the operations of IGBT151 and 151a will be described. In the structures of FIGS. 29 and 30, with a predetermined collector-emitter voltage (referred to as a collector voltage) VCE being applied between the emitter electrode 7 and the collector electrode 8, a gate-emitter voltage (referred to as a gate voltage) VGE with a positive bias having a predetermined level is applied between the emitter electrode 7 and the gate electrode 5; that is, upon turning on the gate, the conductive type of the channel region CH is inverted from a P type to an N type. As a result, a channel serving as a carrier path is formed in the channel region CH. Electrons are injected from the emitter electrode 7 to the Nxe2x88x92 base layer through this channel. The electrons thus injected make the P+ collector layer 91 and the N base layers 92, 93 forwardly biased so that holes are injected to the N base layers 92, 93 from the P+ collector layer 91. As a result, the resistance of the Nxe2x88x92 base layer 92 drops greatly so that the current capacity of the IGBT151, 151a is increased.
Next, when the gate voltage VGE is set from a positive bias value to 0 or a reverse bias value, that is, when the gate is turned off, the channel region CH, inverted to the N type, is restored to the P type. Consequently, the injection of electrons from the emitter electrode 7 is stopped. The stop of injection of electrons also stops the injection of holes from the P+ collector layer 91. Thereafter, electrons and holes, accumulated in the N base layers 92, 93, are either drawn into the collector electrode 8 and the emitter electrode 7, respectively, or recombined with each other to disappear.
Next, a description will be given of a semiconductor device as a typical applied apparatus of the conventional IGBTs151 and 151a. FIG. 31 is a circuit diagram (in which 151 is typically added as a reference number for an IGBT) of a semiconductor device using the IGBTs151, 151a as switching elements. This semiconductor device 152 is formed as a three-phase inverter. Freewheel diodes 160 are parallel-connected to six IGBTs151, respectively. Freewheel diodes 160 are connected in such a direction that the reverse current of the corresponding IGBT151 is bypassed. The parallel connection in this direction is also referred to as xe2x80x9creverse parallel connectionxe2x80x9d.
With respect to six IGBTs151, every two of them are series-connected. The collector electrode 8 of one of two series-connected IGBTs151 is connected to a higher potential power-supply terminal PP, and the emitter electrode 7 of the other is connected to a lower potential power-supply terminal NN. That is, three series circuits, each having two IGBTs151, are connected in parallel with each other between the higher potential power-supply terminal PP and the lower potential power-supply terminal NN. An external d-c power-supply 20 is connected to the higher potential power supply terminal PP and the lower potential power-supply terminal NN so as to supply a direct-current voltage. In each of the series circuits, a connected portion of two IGBTs151 series-connected is connected to any one of output terminals U, V, W. For example, a load 21 of, for example, a three-phase motor is connected to the three-phase output terminals U, V, W. A gate voltage VGE is externally applied to each of six gate electrodes 5 placed in six IGBTs151 individually so that six IGBTs151 are selectively turn on and off. Thus, three-phase alternating currents are supplied to the load 21. Here, a single-phase inverter, constituted by removing one of the three series circuits from the semiconductor device 152 of FIG. 31, has been conventionally used.
FIG. 32 is a plan view of a conventionally-known semiconductor device that shows a specific construction of the semiconductor device (that is, a three-phase inverter) of FIG. 31, and FIG. 33 is a cross-sectional view of the semiconductor device taken along a cutting line Xxe2x80x94X of FIG. 32. The circuit diagram of this semiconductor device 153 is shown in FIG. 31. The semiconductor device 153 comprises a housing 130, a heat-radiating plate 131 formed as one portion thereof, a substrate 135 placed on the heat-radiating plate 131, the six IGBTs151 placed on the substrate 135, the six freewheel diodes 160 also placed on the substrate 135, the higher potential power-supply terminal PP, the lower potential power-supply terminal NN, the three output terminals U, V, W, the six gate terminals G, a plurality of conductive wires w and a lid 133.
The housing 130 (including the heat-radiating plate 131) and the lid 133 cooperatively form a closed space 132, and the substrate 135 is mounted in this closed space 132. Each of the higher potential power-supply terminal PP, the lower potential power-supply terminal NN, the three output terminals U, V, W, and the six gate terminals G, is buried in the housing 130 so that its upper end portion protrudes from an upper portion of the housing 130, and its lower end portion is exposed to the closed space 132. The six IGBTs151 and the six freewheel diodes 160 are connected to the eleven terminals PP, NN, U, V, W, G through a number of conductive wires w. The conductive wires w are, for example, aluminum wires. Here, FIG. 32 shows the semiconductor device 153 with its lid 133 removed.
FIG. 34 is a plan view of the substrate 135, and also shows the IGBTs151 and the freewheel diodes 160 placed thereon. The substrate 135 comprises an insulating plate 136 and wiring patterns 137 placed thereon. The insulating plate 136 is fixed on the heat-radiating plate 131 (FIG. 33), and the IGBT151 and the freewheel diode 160 are mounted onto the wiring pattern 137, and electrically connected thereto. In this manner, both of the IGBT151 and the freewheel diode 160 are used in the form of a bear chip.
The collector electrode 8 of each IGBT151 is connected to the cathode electrode of the corresponding freewheel diode 160 through the wiring pattern 137. The emitter electrode 7 of each IGBT151 and the anode electrode of the corresponding freewheel diode 160 are connected to each other through the conductive wire w. Moreover, the emitter electrode 7 of one of the two IGBTs151 constituting a series circuit and the higher potential power-supply terminal PP are connected to each other by the conductive wire w, and the emitter electrode 7 of the other and any one of the three output terminals U, V, W, the collector electrode 8 of the one and any one of the three output terminals U, V, W, and the collector electrode 8 of the other and the lower potential power-supply terminal NN are respectively connected to each other by the wiring pattern 137 and the conductive wire w. Moreover, the respective gate electrodes 5 of the six IGBTs151 and the corresponding gate terminals G are connected to each other by the conductive wires w.
FIG. 35 is an inner perspective view of a semiconductor device that shows another example of an applied apparatus. This semiconductor device 154 comprises a heat-radiating plate 125, an IGBT151 and a freewheel diode 160 that are placed thereon, a collector terminal 121, an emitter terminal 122, a gate terminal 123, conductive wires w and a sealing member 126 that seals all the elements except for the tip portions of the respective three terminals 121, 122, 123. A heat-radiating plate 125, which is made of cupper, and also referred to as a cupper frame, serves as a reinforcing member and a wiring pattern as well.
The collector electrode 8 of the IGBT151 is connected to the cathode electrode of the corresponding freewheel diode 160 and the collector terminal 121 through the heat-radiating plate 125. The emitter electrode 7 of the IGBT151 and the anode electrode of the corresponding freewheel diode 160 are connected to each other by the conductive wire w. Moreover, the emitter electrode 7 of the IGBT151 and the emitter terminal 122 are connected to each other by the conductive wire w, and the gate electrode 5 of the IGBT151 and the gate terminal 123 are also connected to each other by the conductive wire w.
As shown in FIGS. 31 to 33, in the case when an inductive load such as a motor is connected to the conventional IGBT151 (or 151a in the same manner), the freewheel diode 160 has been required so as to bypass a circulating current that forms a reverse current to the IGBT151. An inductive component included in the impedance of the inductive load (for example, represented by an induction L) stores energy in a magnetic field generated by a current. Therefore, a change in the current flowing through the induction L corresponds to a change in the energy to be stored. During the process in which the current flowing through the inductive load is interrupted, the induction L is exerted in such a way as to interrupt the change in current. Energy, accumulated in the induction L, is released to the IGBT151 that serves as a switching element to interrupt the current so that the current flowing through the induction L is attenuated.
The energy accumulated in the induction L is so great that, if released instantaneously, it might easily break the IGBT151. Therefore, during the process in which the IGBT151 is turned off, the current flowing through the inductive load is circulated by bypassing it to the free-wheel diode 160 so that the current flowing through the inductive load is not changed by the switching. In the semiconductor device 152 of FIG. 31, when one of the IGBTs151, which has been turned on to electrically connect the direct-current power supply 20 to the load 21 and supply a power-supply voltage to the load 21, is turned off, the current flowing through the load 21 is made to pass through the freewheel diode 160 and reversely flow through the direct-current power supply 20 by energy stored in the induction L of the load 21. As a result, a direct-current voltage that is reversed equivalently is applied to the load 21.
By changing the ratio between the time in which the IGBT151 is on and the time in which it is off, the ratio between the period in which the power-supply voltage of the direct-current power supply 20 is applied in the forward direction and the period in which it is applied in the reverse direction is changed so that it is possible to control the average voltage to be applied to the load 21. Thus, by allowing this ratio to change in a sine-wave form, it is possible to supply to the load 21 a smooth alternating current without abruptly turning on or off the current flowing through the load 21 in synchronism with switching of the IGBT151.
The inverter such as the semiconductor device 152 carries out the above-described operation so that, as shown in FIGS. 31 to 33, it is necessary to connect the freewheel diode 160 in reverse-parallel to the corresponding IGBT151. A power MOSFET, which has been used as a switching element since before the appearance of the IGBT151, inherently has a structure having a built-in reverse-parallel diode; therefore, it has been not necessary to connect the freewheel diodes 160 thereto in a separated manner. However, the power MOSFET has only a low current density, and is not suitable for the application with a great current.
In contrast, the IGBT, which is suitable for the application with a great current, and has a construction in which an N+ layer of the power MOSFET is replaced with the P+ collector layer 91 so that a parasitic diode is formed between the P+ collector layer 91 on the collector electrode 8 side and the Nxe2x88x92 base layers 92, 93. This tends to function as a high barrier with respect to a circulating current. The breakdown voltage of the parasitic diode is approximately 30 to 50 V, and this is an excessively high value so as to use the parasitic diode as a substitute for the reverse-parallel-connected freewheel diode. For this reason, if the freewheel diode 160 is not connected, IGBT151 might be damaged due to heat generated by a reverse voltage generated at the time of the circulation.
As described above, although the conventional IGBTs151, 151a are superior to the power MOSFETs in that the current density is great, they need to be connected to the freewheel diodes 160 when they are applied, and this causes extra costs and makes the structure of a semiconductor device serving as an application device complex, resulting in an increase in the size, an increase in the number of parts used for connections as well as an increase in processing costs.
The present invention has been devised to solve the above-mentioned problems, and an object thereof is to provide an insulated gate bipolar transistor which can eliminate the necessity of connection to a freewheel diode, a semiconductor device using such a transistor, and manufacturing method thereof.
In order to achieve this object, the first aspect of the present invention is related to an insulated gate bipolar transistor comprising a semiconductor substrate having first and second major surfaces, a collector electrode which is located on said first major surface side of the semiconductor substrate, and an emitter electrode and a gate electrode that are located on said second major surface side, wherein the semiconductor substrate comprises a collector layer of a first conductive type that is exposed to the first major surface and connected to the collector electrode, and a base layer of a second conductive type that is formed on the collector layer and is not exposed to the first major surface, and wherein the base layer and the collector layer have a characteristic as a free-wheel diode.
The second aspect of the present invention, which relates to an insulated gate bipolar transistor in accordance with the first aspect, wherein a reverse voltage resistance, which is a minimum value of a collector-emitter voltage when a reverse current flows between the emitter electrode and the collector electrode, is set to not more than 5 times a collector-emitter saturated voltage.
The third aspect of the present invention, which relates to an insulated gate bipolar transistor in accordance with the second aspect, is designed so that the base layer comprises a base main body portion and a buffer layer that has a higher concentration of impurities than the base main body portion and is interpolated between the collector layer and the base main body portion, and a minimum value of a collector-emitter voltage when an avalanche current flows through a parasitic diode formed by the base layer and the collector layer is equivalent to the reverse voltage resistance.
The fourth aspect of the present invention, which relates to the insulated gate bipolar transistor in accordance with the second aspect, is designed so that the semiconductor substrate further comprises a reverse conductive-type layer of the second conductive type that is formed inside the collector layer so as not to be connected to the base layer, and selectively exposed to the first major surface, and connected to the collector electrode, and a minimum value of a collector-emitter voltage, that causes a punch through in which a depletion layer generated in a PN junction between the base layer and the collector layer reaches the reverse conductive-type layer, is equivalent to the reverse voltage resistance.
The fifth aspect of the present invention, which relates to the insulated gate bipolar transistor in accordance with the fourth aspect, is designed so that the collector layer comprises a low impurity concentration collector layer, and a high impurity concentration collector layer, the low impurity concentration collector layer comprises a portion of the collector layer sandwiched by the base layer and the reverse conductive-type layer, and the high impurity concentration collector layer has a concentration of impurities higher than the low impurity concentration collector layer.
The sixth aspect of the present invention, which relates to the insulated gate bipolar transistor in accordance with the fourth aspect, is designed so that the base layer comprises a base main body portion, and a buffer layer that has a higher concentration in impurities than the base main body portion, and is interpolated between the collector layer and the base main body portion.
The seventh aspect of the present invention, which relates to the insulated gate bipolar transistor in accordance with the second aspect, is designed so that the semiconductor substrate further comprises a reverse conductive-type layer of the second conductive type that is formed inside the collector layer so as not to be connected to the base layer, and selectively exposed to the first major surface and connected to the collector electrode, and a minimum value of a collector-emitter voltage when a parasitic bipolar transistor formed by the base layer, the collector layer and the reverse conductive type layer turns on, is equivalent to the reverse voltage resistance.
The eighth aspect of the present invention, which relates to the insulated gate bipolar transistor in accordance with the seventh aspect, is designed so that the collector layer comprises a low impurity concentration collector layer, and a high impurity concentration collector layer, and the low impurity concentration collector layer comprises a portion of the collector layer sandwiched by the base layer and the reverse conductive-type layer, and the high impurity concentration collector layer has a concentration of impurities higher than the low impurity concentration collector layer.
The ninth aspect of the present invention, which relates to the insulated gate bipolar transistor in accordance with the seventh aspect, is designed so that the base layer comprises a base main body portion, and a buffer layer that has a higher concentration in impurities than the base main body portion, and is interpolated between the collector layer and the base main body portion.
The tenth aspect of the present invention, which relates to the insulated gate bipolar transistor in accordance with the second aspect, is designed so that the reverse voltage resistance is not more than 10 V.
In accordance with the eleventh aspect of the present invention, a semiconductor device comprises the insulated gate bipolar transistor in accordance with the first aspect, a housing in which the insulated gate bipolar transistor is mounted, and three terminals each of which is attached to said housing with its one portion protruding from said housing toward the exterior, and which are electrically connected to said gate electrode, said emitter electrode and said collector electrode of the insulated gate bipolar transistor, respectively.
In accordance with the twelfth aspect of the present invention, the semiconductor device which relates to the eleventh aspect is designed so that the gate electrode, the emitter electrode and the collector electrode are electrically connected to the three terminals through conductive wires, respectively.
The thirteenth aspect of the present invention, which relates to the semiconductor device in accordance with the eleventh aspect, further comprises the insulated gate bipolar transistor serving as a first transistor, three insulated gate bipolar transistors having the same structure as the first transistor and serving as second through fourth transistors, the three-terminals serving as first to third terminals, and five terminals each of which is attached to the housing with one portion thereof protruding from the housing toward the exterior, the five terminals serving as fourth to eighth terminals, wherein the first and second transistors are series-connected, the third and fourth transistors are series-connected, the first terminal is electrically connected to the collector electrodes of the first and third transistors, the second terminal is electrically connected to connecting sections of the first and second transistors, the third terminal is electrically connected to the gate electrode of the first transistor, the fourth terminal is electrically connected to the emitter electrodes of the second and fourth transistors, the fifth terminal is electrically connected to connecting sections of the third and fourth transistors, and the sixth through eighth terminals are electrically connected to the gate electrodes of the second through fourth transistors, respectively.
The fourteenth aspect of the present invention, which relates to the semiconductor device in accordance with the thirteenth aspect, further comprises an inductive load connected to the second terminal and the fifth terminal.
The fifteenth aspect of the present invention, which relates to a semiconductor device, comprises the insulated gate bipolar transistor in accordance with the first aspect, a sealing member that seals the insulated gate bipolar transistor, and three terminals each of which is sealed by the sealing member with one portion thereof protruding from the sealing member toward the exterior, the three terminals electrically connected to the gate electrode, the emitter electrode and the collector electrode of the insulated gate bipolar transistor, respectively.
In accordance with the sixteenth aspect of the present invention, a manufacturing method of an insulated gate bipolar transistor which comprises a semiconductor substrate having first and second major surfaces, a collector electrode that is located on the first major surface side of the semiconductor substrate, and an emitter electrode and a gate electrode that are located on the second major surface side, comprising the steps of: (a) forming the semiconductor substrate so as to provide a collector layer of a first conductive type that is exposed to the first major surface and a base layer of a second conductive type that is formed on the collector layer and is not exposed to the first major surface, and (b) forming the collector electrode on the first major surface so as to be connected to the collector layer, wherein in the step (a), the semiconductor substrate is formed so that the base layer and the collector layer are allowed to have a characteristic as a freewheel diode.
The seventeenth aspect of the present invention, which relates to the manufacturing method of an insulated gate bipolar transistor in accordance with the sixteenth aspect, is designed so that in the step (a), the semiconductor substrate is formed in such a manner that a reverse voltage resistance, which is a minimum value of a collector-emitter voltage when a reverse current flows between the emitter electrode and the collector electrode, is set to not more than 5 times the collector-emitter saturated voltage.
The eighteenth aspect of the present invention, which relates to the manufacturing method of an insulated gate bipolar transistor in accordance with the seventeenth aspect, is designed so that in the step (a), the base layer comprises a base main body portion and a buffer layer that has a higher concentration in impurities than the base main body portion and is interpolated between the collector layer and the base main body portion, and the semiconductor substrate is formed so that a minimum value of a collector-emitter voltage when an avalanche current flows through a parasitic diode formed by the base layer and the collector layer is equivalent to the reverse voltage resistance.
The nineteenth aspect of the present invention, which relates to the manufacturing method of an insulated gate bipolar transistor in accordance with the seventeenth aspect, is designed so that in the step (a), the semiconductor substrate further comprises a reverse conductive-type layer of the second conductive type that is formed inside the collector layer so as not to be connected to the base layer, and selectively exposed to the first major surface, and connected to the collector electrode, and the semiconductor substrate is formed so that a minimum value of a collector-emitter voltage that causes a punch through in which a depletion layer generated in a PN junction between the base layer and the collector layer reaches the reverse conductive-type layer is equivalent to the reverse voltage resistance.
The twentieth aspect of the present invention, which relates to the manufacturing method of the insulated gate bipolar transistor in accordance with the nineteenth aspect, is designed so that in the above-mentioned step (a), the collector layer comprises a low impurity concentration collector layer and a high impurity concentration collector layer, and in the semiconductor substrate thus formed, the low impurity concentration collector layer includes a portion of the collector layer sandwiched by the base layer and the reverse conductive-type layer, and the high impurity concentration collector layer has a concentration of impurities higher than the low impurity concentration collector layer.
The twenty-first aspect of the present invention, which relates to the manufacturing method of the insulated gate bipolar transistor in accordance with the nineteenth aspect, is designed so that in the step (a), the semiconductor substrate is formed in such a manner that the base layer comprises a base main body portion and a buffer layer that has a higher concentration in impurities than the base main body portion, and is interpolated between the collector layer and the base main body portion.
The twenty-second aspect of the present invention, which relates to the manufacturing method of an insulated gate bipolar transistor in accordance with the seventeenth aspect, is designed so that in the step (a), the semiconductor substrate further comprises a reverse conductive-type layer of the second conductive type that is formed inside the collector layer so as not to be connected to the base layer, and selectively exposed to the first major surface, and connected to the collector electrode, and the semiconductor substrate is formed so that a minimum value of a collector-emitter voltage when a parasitic bipolar transistor formed by the base layer, the collector layer and the reverse conductive type layer turns on is equivalent to the reverse voltage resistance.
The twenty-third aspect of the present invention, which relates to the manufacturing method of the insulated gate bipolar transistor in accordance with the twenty-second aspect, is designed so that in the step (a), the semiconductor substrate is formed in such a manner that the collector layer comprises a low impurity concentration collector layer and a high impurity concentration collector layer, and in this structure, the low impurity concentration collector layer includes a portion of the collector layer sandwiched by the base layer and the reverse conductive-type layer, and the high impurity concentration collector layer has a concentration of impurities higher than the low impurity concentration collector layer.
The twenty-fourth aspect of the present invention, which relates to the manufacturing method of the insulated gate bipolar transistor in accordance with the twenty-second aspect, is designed so that in the step (a), the semiconductor substrate is formed in such a manner that the base layer comprises a base main body portion and a buffer layer that has a higher concentration in impurities than the base main body portion, and is interpolated between the collector layer and the base main body portion.
The twenty-fifth aspect of the present invention, which relates to the manufacturing method of the insulated gate bipolar transistor in accordance with the seventeenth aspect, is designed so that in the step (a), the semiconductor substrate is formed in such a manner that the reverse voltage resistance is set to not more than 10 V.
In the twenty-sixth aspect of the present invention, a manufacturing method of a semiconductor device comprises the steps of: (A) obtaining a housing having three terminals each of which is attached thereto with its one portion protruding toward the exterior, (B) executing the manufacturing method of the insulated gate bipolar transistor according to claim 16 to thereby obtain the insulated gate bipolar transistor, (C) mounting the insulated gate bipolar transistor in the housing, and (D) electrically connecting the three terminals to the gate electrode, the emitter electrode and the collector electrode of the insulated gate bipolar transistor, respectively.
In the twenty-seventh aspect of the present invention that relates to the manufacturing method of the semiconductor device in accordance with the twenty-sixth aspect, the step (D) further comprises a step (D-1) of electrically connecting the gate electrode, the emitter electrode and the collector electrode to the three terminals respectively through conductive wires.
In the twenty-eighth aspect of the present invention that relates to the manufacturing method of the semiconductor device in accordance with the twenty-sixth aspect, the step (A) is arranged so that the housing is obtained with the three-terminals serving as the first to third terminals, and allowed to further include five terminals each of which is attached thereto with its one portion externally sticking out as the fourth through eighth terminals; the step (B) is arranged so that the insulated gate bipolar transistor is obtained as the first transistor with three insulated gate bipolar transistors having the same structure as the first transistor being obtained as the second through fourth transistors; the step (C) is arranged so that, in addition to the first transistor, the second through fourth transistors are mounted in the housing; and the step (D) further comprises the steps of: (D1) connecting the first and second transistors in series with each other; (D2) connecting the third and fourth transistors in series with each other; (D3) electrically connecting the first terminal to the collector electrodes of the first and third transistors; (D4) electrically connecting the second terminal to the connecting sections of the first and second transistors; (D5) electrically connecting the third terminal to the gate electrode of the first transistor; (D6) electrically connecting the fourth terminal to the emitter electrodes of the second and fourth transistors; (D7) electrically connecting the fifth terminal to the connecting sections of the third and fourth transistors; and (D8) electrically connecting the six through eighth terminals to the gate electrodes of the second through fourth transistors.
In the twenty-ninth aspect of the present invention, the manufacturing method of the semiconductor device in accordance with the twenty-eighth aspect further comprises a step of (E) connecting an inductive load to the second terminal and the fifth terminal.
In the thirtieth aspect of the present invention, a manufacturing method of a semiconductor device comprises the steps of: (A) obtaining three terminals, (B) executing the manufacturing method of the insulated gate bipolar transistor according to claim 16 to thereby obtain the insulated gate bipolar transistor, (C) electrically connecting the three terminals to the gate electrode, the emitter electrode and the collector electrode of the insulated gate bipolar transistor, respectively, and (D) sealing the insulated gate bipolar transistor and the three terminals in such a manner that one portion of each of the three terminals is allowed to protrude toward the exterior.
The present invention, which has the arrangements as described above, makes it possible to provide the following effects.
In accordance with the insulated gate bipolar transistor related to the first aspect of the present invention, since the base layer and the collector layer have the characteristic of the freewheel diode, it is not necessary to externally connect the freewheel diode upon application thereof.
In accordance with the insulated gate bipolar transistor related to the second aspect of the present invention, since the reverse voltage resistance is reduced to not more than 5 times the collector-emitter saturated voltage, the circulating current is allowed to flow through itself without the necessity of any special heat-radiating design even when an inductive load is connected thereto.
In accordance with the insulated gate bipolar transistor related to the third aspect of the present invention, since the reverse voltage resistance is determined by the avalanche breakdown of the parasitic diode, it is possible to easily suppress the collector-emitter saturated voltage to a low level by increasing the concentration of impurities of the collector layer. Moreover, since the buffer layer is installed, it is possible to make the base layer thinner, and consequently to further reduce both of the collector-emitter saturated voltage and the reverse voltage resistance.
In accordance with the insulated gate bipolar transistor related to the fourth aspect of the present invention, since the reverse conductive-type layer is formed inside the collector layer, the reverse voltage resistance is determined by a punch through voltage, and it becomes possible to set the reverse voltage resistance to a low level.
In accordance with the insulated gate bipolar transistor related to the fifth aspect of the present invention, since the collector layer comprises the high impurity concentration collector layer, it becomes possible to suppress the collector-emitter saturated voltage to a low level by compensating for the reduction in the amount of injection of holes due to the installed reverse conductive-type layer.
In accordance with the insulated gate bipolar transistor related to the sixth aspect of the present invention, since the buffer layer is installed, it is possible to make the base layer thinner, and consequently to further reduce both of the collector-emitter saturated voltage and the reverse voltage resistance.
In accordance with the insulated gate bipolar transistor related to the seventh aspect of the present invention, since the reverse conductive-type layer is formed inside the collector layer, the reverse voltage resistance is determined by a turning-on of the parasitic bipolar transistor so that it becomes possible to easily set the reverse voltage resistance to a low level.
In accordance with the insulated gate bipolar transistor related to the eighth aspect of the present invention, since the collector layer comprises the high impurity concentration collector layer, it becomes possible to suppress the collector-emitter saturated voltage to a low level by compensating for the reduction in the amount of injection of holes due to the installed reverse conductive-type layer.
In accordance with the insulated gate bipolar transistor related to the ninth aspect of the present invention, since the buffer layer is installed, it is possible to make the base layer thinner, and consequently to further reduce both of the collector-emitter saturated voltage and the reverse voltage resistance.
In accordance with the insulated gate bipolar transistor related to the tenth aspect of the present invention, since the reverse voltage resistance is set to not more than 10 V, it is possible to reduce the amount of heat generation due to the reverse current to a low level, even in the case of a collector-emitter saturated voltage exceeding 2 V.
In accordance with a semiconductor device related to the eleventh aspect of the present invention, since the insulated gate bipolar transistor is mounted in a housing, it is possible to provide a convenient means in which the insulated gate bipolar transistor is connected to a power supply and a load and utilized. Moreover, since the insulated gate bipolar transistor in accordance with the first aspect of the present invention that requires no freewheel diodes is utilized, it is possible to miniaturize the device, and also to cut manufacturing costs.
In accordance with the semiconductor device related to the twelfth aspect of the present invention, since each electrode of the insulated gate bipolar transistor and each terminal are electrically connected through the conductive wire, it is possible to simplify the manufacturing process, and consequently to further reduce the manufacturing cost. In particular, since no freewheel diodes are required, it is possible to reduce the number of conductive wires and the number of connecting processes.
In accordance with the semiconductor device related to the thirteenth aspect of the present invention, since the insulated gate bipolar transistor in accordance with the first aspect of the present invention that requires no freewheel diodes is utilized, it is possible to achieve a small-size inverter that is inexpensive and easily used.
In accordance with the semiconductor device related to the fourteenth aspect of the present invention, since an inductive load is connected, it is possible to drive the inductive load by only connecting a direct current supply and a control circuit.
In accordance with the semiconductor device related to the fifteenth aspect of the present invention, since the insulated gate bipolar transistor is sealed by the sealing member, it is possible to provide a convenient means in which the insulated gate bipolar transistor is connected to a power supply and a load and utilized. Moreover, since the insulated gate bipolar transistor in accordance with the first aspect of the present invention that requires no freewheel diodes is utilized, it is possible to miniaturize the device, and also to cut manufacturing costs.
In accordance with the manufacturing method of the insulated gate bipolar transistor related to the sixteenth aspect of the present invention, since the base layer and collector layer are allowed to have the characteristic as the freewheel diode, it is possible to obtain the insulated gate bipolar transistor that requires no externally connected freewheel diode upon application thereof.
In accordance with the manufacturing method of the insulated gate bipolar transistor related to the seventeenth aspect of the present invention, since the reverse voltage resistance is reduced to not more than 5 times the collector-emitter saturated voltage, it is possible to provide the insulated gate bipolar transistor in which the circulating current is allowed to flow through itself without the necessity of any special heat-radiating design even when an inductive load is connected thereto.
In accordance with the manufacturing method of the insulated gate bipolar transistor related to the eighteenth aspect of the present invention, since the semiconductor substrate is formed so that the reverse voltage resistance is determined by the avalanche breakdown of the parasitic diode, it is possible to easily suppress the collector-emitter saturated voltage to a low level by increasing the concentration of impurities of the collector layer. Moreover, since the buffer layer is installed, it is possible to make the base layer thinner, and consequently to further reduce both of the collector-emitter saturated voltage and the reverse voltage resistance.
In accordance with the manufacturing method of the insulated gate bipolar transistor related to the nineteenth aspect of the present invention, since the semiconductor substrate is formed so that the reverse conductive-type layer is formed inside the collector layer and the reverse voltage resistance is consequently determined by a punch through voltage, it becomes possible to set the reverse voltage resistance to a low level.
In accordance with the manufacturing method of the insulated gate bipolar transistor related to the twentieth aspect of the present invention, since the semiconductor substrate is formed so that the collector layer comprises the high impurity concentration collector layer, it becomes possible to suppress the collector-emitter saturated voltage to a low level by compensating for the reduction in the amount of injection of holes due to the installed reverse conductive-type layer.
In accordance with the manufacturing method of the insulated gate bipolar transistor related to the twenty-first aspect of the present invention, since the buffer layer is installed, it is possible to make the base layer thinner, and consequently to further reduce both of the collector-emitter saturated voltage and the reverse voltage resistance.
In accordance with the manufacturing method of the insulated gate bipolar transistor related to the twenty-second aspect of the present invention, since the semiconductor substrate is formed so that the reverse conductive-type layer is formed inside the collector layer with the reverse voltage resistance being determined by a turning-on of the parasitic bipolar transistor, it becomes possible to easily set the reverse voltage resistance to a low level.
In accordance with the manufacturing method of the insulated gate bipolar transistor related to the twenty-third aspect of the present invention, since the semiconductor substrate is formed so that the collector layer has the high impurity concentration collector layer, it becomes possible to suppress the collector-emitter saturated voltage to a low level by compensating for the reduction in the amount of injection of holes due to the installed reverse conductive-type layer.
In accordance with the manufacturing method of the insulated gate bipolar transistor related to the twenty-fourth aspect of the present invention, since the buffer layer is installed, it is possible to make the base layer thinner, and consequently to further reduce both of the collector-emitter saturated voltage and the reverse voltage resistance.
In accordance with the manufacturing method of the insulated gate bipolar transistor related to the twenty-fifth aspect of the present invention, since the reverse voltage resistance is set to not more than 10 V, it is possible to reduce the amount of heat generation due to the circulating current to a low level, even in the case of the collector-emitter saturated voltage exceeding 2 V.
In accordance with the manufacturing method of the semiconductor device related to the twenty-sixth aspect of the present invention, since the insulated gate bipolar transistor is mounted in the housing, it is possible to provide the convenient means in which the insulated gate bipolar transistor is connected to a power supply and a load and utilized. Moreover, since the insulated gate bipolar transistor in accordance with the first aspect of the present invention that requires no freewheel diodes is utilized, it is possible to miniaturize the device, and also to cut manufacturing costs.
In accordance with the manufacturing method of a semiconductor device related to the twenty-seventh aspect of the present invention, since each electrode of the insulated gate bipolar transistor and each terminal are electrically connected through the conductive wire, it is possible to simplify the manufacturing process, and consequently to further reduce the manufacturing cost. In particular, since no freewheel diodes are required, it is possible to reduce the number of conductive wires and the number of connecting processes.
In accordance with the manufacturing method of the semiconductor device related to the twenty-eighth aspect of the present invention, since the insulated gate bipolar transistor in accordance with the first aspect of the present invention that requires no freewheel diodes is utilized, it is possible to achieve a small-size inverter that is inexpensive and easily used.
In accordance with the manufacturing method of a semiconductor device related to the twenty-ninth aspect of the present invention, since the inductive load is connected, it is possible to provide the semiconductor device that can drive the inductive load by only connecting a direct current supply and a control circuit.
In accordance with the manufacturing method of the semiconductor device related to the thirtieth aspect of the present invention, since the insulated gate bipolar transistor is sealed by the sealing member, it is possible to provide the convenient semiconductor device in which the insulated gate bipolar transistor is connected to a power supply and a load, and utilized. Moreover, since the insulated gate bipolar transistor in accordance with the first aspect of the present invention that requires no freewheel diodes is utilized, it is possible to miniaturize the device, and also to cut manufacturing costs.
These and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.